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2.3GHz to 2.7GHz MIMO Wireless
Broadband RF Transceiver
Table 11. Register 8: RX_TOP_SPI_1 Register (Address = 01000, Default = 222 HEX )
BIT NAME
RESERVED
LPF_MODE_SEL
VGA_GAIN _SPI_EN
RESERVED
BIT LOCATION
(0 = LSB)
9:3
2
1
0
DESCRIPTION
Reserved bits—set to default
LPF operating mode select.
0 = LPF response changes automatically between Tx and Rx by TXRX pin
(default)
1 = LPF response fixed in Tx, Rx, calibration, or trim mode as defined in
register 5 D<9:8>
Rx VGA gain control through SPI.
0 = Rx VGA gain controlled by external pins B5:B1
1 = Rx VGA gain controlled by SPI (default)
Reserved bits—set to default
Table 12. Register 9: RX_TOP_SPI_2 Register (Address = 01001, Default = 018 HEX )
BIT NAME
RESERVED
DOUT_SEL<2:0>
DOUT_CSB_SEL
DOUT_DRVH
RESERVED
TS_EN
TS_ADC_TRIG
BIT LOCATION
(0 = LSB)
9:8
7:5
4
3
2
1
0
DESCRIPTION
Reserved bits—set to default
DOUT pin multiplexed output select.
000 = SPI register (default)
001 = PLL lock detect. Set register 21 D<9:7> = 000 for lock-detect out.
010 = VAS and VTUNE outputs defined by register 26 D<9:6>
DOUT pin three-state control.
0 = DOUT pin is independent of CSB pin
1 = DOUT pin is in three-state mode when CSB is high (default)
DOUT pin output drive select.
0 = 1x drive. Delay < 4.4ns.
1 = 4x drive. Delay < 3.1ns (default).
Reserved bits—set to default
Temperature sensor comparator and clock enable.
0 = Disabled (default)
1 = Enabled
Temperature sensor ADC trigger.
0 = Not trigger ADC readout (default)
1 = Trigger ADC readout. ADC is disabled automatically after readout
finishes.
Table 13. Register 10: TX_TOP_SPI Register (Address = 01010, Default = 00C HEX )
BIT NAME
RESERVED
TXCAL_GAIN<1:0>
BIT LOCATION
(0 = LSB)
9:2
1:0
DESCRIPTION
Reserved bits—set to default
Transmit AM detector baseband gain control select.
00 = Minimum gain (default)
01 = +10dB
10 = +20dB
11 = +30dB
28
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